PRELIMINARY DATA SHEET Z90231/233/234/239 1 Z8 DIGITAL TELEVISION CONTROLLERS FEATURES Device ROM (KB) RAM (Bytes) I/O Lines1 Z90231 Z90233 Z90234 Z90239 32(OTP) 16 24 32(ext.) 236 236 236 236 27 27 27 27 Voltage Range 4.5V to 5.5V 4.5V to 5.5V 4.5V to 5.5V 4.5V to 5.5V Note: +VEQWPVUCNNOWZGF+1RQTV Z8-Based CMOS Microcontroller for Consumer Television, Cable Box, and Satellite Receiver Applications 42-Pin SDIP Package except Z90239 (124 PGA) Z8(R) MCU Core at 6 MHz Mask ROM sizes Available in 16 and 24KB Ten 6-bit Pulse Width Modulators One 14-bit Pulse Width Modulator On-Chip Infrared (IR) Capture Registers Four Channel 4-bit Analog-to-Digital Converter Twenty Seven General Purpose I/O Pins I2C Master Serial Communication Port On Screen Display (OSD) Section Supports Displays up to 10 rows by 24 Columns with 256 Characters Character Cell Resolution of 14 Pixels by 18 Scan lines Variable Inter-row Spacing from 0-15 Horizontal Scan Lines Foreground and Background Colors Fully Programmable by Character GENERAL DESCRIPTION The Z9023X Digital Television Controller (DTC) family is ZiLOG's latest and most powerful Z8-based DTC product offering. These parts feature larger system RAM and ROM options, together with a host of new features including a new color palette system, flexible inter-row spacing, higher character cell resolution, background mesh effect, dedicated I.R. capture registers, on-chip Analog-to-Digital conversion, and a hardware Master mode I2C interface. The familiar Z8 core in combination with these advanced features makes the Z9023X family an ideal choice for low to midrange televisions in both PAL and NTSC markets. Z90233 supports 16KB system ROM and Z90234 supports 24KB system ROM for mask. The Z9021X family takes full advantage of the Z8's expanded register file space to offer greater flexibility in On Screen Display creation. Note: All signals with an overline, " ", are active Low. For example, B/: (WORD is active Low, only); %/W (BYTE is active Low, only). The Z9023X family consists of three basic device types; ICE Chip (Z90239), ROM Mask Parts (Z90233/Z90234), and OTP Part (Z90231). The OTP (Z90231) supports field programmable 32KB system ROM. ICE Chip (Z90239) is used in Z90239 Emulator and ProtoPak. As described above, CP00300-TVX0698 1 Part_Number Z8 Digital Television Controllers ZiLOG GENERAL DESCRIPTION (Continued) Power connections follow conventional descriptions below: Connection Circuit Device Power VCC VDD Ground GND VSS, AVSS :6#. :6#. 4'5'6 #&% #&% #&% #&% 1UEKNNCVQT 9&6 4'5'6 %QWPVGT 6KOGT %QWPVGT 6KOGT +4 %QWPVGT 2 2 2 2 2QTV 29/ 29/ 29/ 29/ 29/ 29/ 29/ 29/ 29/ 29/ 2 2 2 2 2 2 2 2QTV <%27 %QTG DKV #&% +4+0 29/ - $[VG 2TQITCO41/ 4GIKUVGT(KNG 2QTV $[VG 29/ DKV 29/ VQ 29/ DKV %JCTCEVGT4#/ D[DKV D[DKV +% +PVGTHCEG 1P5ETGGP &KURNC[ 1WVRWV 2QTV %JCTCEVGT41/ -D[DKV 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 5%.- 5&#6# 5%.- 5&#6# 15&: 15&: *5[PE 85[PE 4 ) $ 8$NCPM *.(60 Figure 1. Functional Block Diagram 2 PRELIMINARY CP00300-TVX0698 Z90231/233/234/239 Z8 Digital Television Controllers ZiLOG PIN IDENTIFICATION 29/2 29/2 29/2 29/2 29/2 29/2 29/2 2 2#&% 2#&% 2#&% 2#&% #855 2 2 2 229/ 229/ 229/ 229/ 2*.(60 <Z 6QR8KGY 25&#6# 25%.- 25&#6# 25%.- 2 2 +4+0 2 8&& 4'5'6 :6#. :6#. 855 15&: 15&: 85;0% *5;0% 8$.#04 ) $ Figure 2. 42-Pin SIDP Pin Identification CP00300-TVX0698 PRELIMINARY 3 Part_Number Z8 Digital Television Controllers ZiLOG PIN IDENTIFICATION (Continued) Table 1. Z90231/233/234 42-Pin SDIP Package Pin Number Pin Function I/O/PWR Reset State Name 34 +5 Volts PWR PWR VDD 30,13 0 Volts PWR PWR VSS, AVSS 36 1 20,19,18,17,2,3,4,5,6,7 7,6,5,4,3,2,1 42,41,40,39,38,37,35,21 21 40,42 39,41 16,12,10,9 20,19,18,17,15,14,11,8 31 32 28 29 26 27 25 24,23,22 9,10,11,12 33 Note: Infra Red remote capture input 14-bit Pulse Width Modulator output 6-bit Pulse Width Modulator output Bit Programmable Input/Output ports Bit programmable Input/Output ports Half tone output I2C Data I2C Clock Bit programmable Input/Output ports Bit programmable Input/Output ports Crystal oscillator input Crystal oscillator output Dot clock oscillator input Dot clock oscillator output Horizontal Sync Vertical Sync Video blank Video R,G,B 4-bit Analog to Digital converter input Device reset I O O I/O I/O O I/O I/O I/O I/O I O I O I I O O AI I I I I I I I I I I I I O I O I I O O I I IRIN PWM11 PWM[10:1] P5[6:0] P2[7:0] HLFTN SDATA0,1 SCLK0,1 P6[3:0] P4[7:0] XTAL1 XTAL2 OSDX1 OSDX2 HSYNC VSYNC VBLANK R,G,B ADC[3:0] /RESET Note 1 1 1. It is Input on POR. It must be configured to be output ports for PWM applications 4 PRELIMINARY CP00300-TVX0698 Z90231/233/234/239 Z8 Digital Television Controllers ZiLOG ABSOLUTE MAXIMUM RATINGS Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This rating is a stress rating only. Operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Symbol Parameters Min Max Units Notes VDD Power Supply Voltage -0.3 +7 V VI Input Voltage -0.3 VDD+0.3 V VO Output Voltage -0.3 VDD+0.3 V IOH Output Current High -10 mA per pin IOH Output Current High -100 mA per device IOL Output Current Low 20 mA per pin IOL Output Current Low 200 mA per device TA Operating Temperature 0 70 oC TSTG Storage Temperature -55 150 oC STANDARD TEST CONDITIONS The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to GND. Positive current flows into the referenced pin (Figure 3). +5V 2.1 k From Output Under Test 150 pF 9.1 k Figure 3. Test Load Diagram CP00300-TVX0698 PRELIMINARY 5 Part_Number Z8 Digital Television Controllers ZiLOG DC CHARACTERISTICS 6#Q%VQ Q%8&& 8VQ 8(15%/*\ Symbol Parameter Min Typical Max Units VDD Power Supply Voltage 4.5 5.00 5.5 V VIH Input Voltage High 0.7VDD VDD V VIL Input Voltage Low 0 0.2VDD V VIHC Input XTAL/Osc in High 0.7VDD VCC V VILC Input XTAL/Osc In Low 0 0.07VDD V VOH_ST Output Voltage High VDD-0.4 VOL_ST Output Voltage Low VOH_LE Output Voltage High VOL_LE Output Voltage Low 0.4 VHY Schmitt Hysteresis 0.1VDD IIR Reset Input Current IIL Input Leakage IOL Tri-State Leakage ICC 4.75 0.16 Conditions V IOH=-2mA for standard drive 0.4 V IOL=2.00mA for standard drive VDD-0.4 V IOH=-0.98mA for low EMI drive V IOL=0.66mA for low EMI drive 0.8 V -46 -80 uA VRL=0V -3.0 0.01 3.0 uA 0V,VDD -3.0 0.02 3.0 uA 0V,VDD Supply Current 25 40 mA All inputs at rail;outputs floating ICC1 HALT Mode Current 3.2 6 mA All inputs at rail;outputs floating ICC2 STOP Mode Current 0.1 10 uA All inputs at rail;outputs floating Note: 6[RKECNXCNWGUOGCUWTGFCVQ%/KPKOWOCPF/CZKOWOXCNWGUKPFKECVGFHTQOQ%VQQ% 6 PRELIMINARY CP00300-TVX0698 Z90231/233/234/239 Z8 Digital Television Controllers ZiLOG AC CHARACTERISTICS No Symbol Parameter Min Max Unit 1 TpC Input clock period 166 1000 ns 2 TrC, TfC Clock input raise and fall 25 ns 3 TwC Input clock width 35 ns 4 TwHSYNCL Timer input low width 70 ns 5 TwHSYNCH Timer input high width 3TpC 6 TpHSYNC Timer input period 8TpC 7 TrHSYNC, TrHSYNC Timer input raise and fall 8 TwIL Int request input low 70 9 TwIH Int request input high 3TpC 10 TdPOR Power-On reset delay 25 11 TdLVIRES 200 12 TwRES Low voltage detect to internal RESET condition Reset minimum width 5TpC 13 TdHsOl Hsync start to Vosc stop 2TpV 14 TdHsOh Hsync start to Vosc start CP00300-TVX0698 PRELIMINARY 100 ns ns 100 ms ns 3TpV 1TpV 7 Part_Number Z8 Digital Television Controllers ZiLOG AC TIMING DIAGRAMS :6#. *5;0% +430 8%% +PVGTPCN4'5'6 'ZVGTPCN4'5'6 *5;0% 15%: Figure 4. Timing Diagram 8 PRELIMINARY CP00300-TVX0698 Z90231/233/234/239 Z8 Digital Television Controllers ZiLOG Pre-Characterization Product: The product represented by this CPS is newly introduced and ZiLOG has not completed the full characterization of the product. The CPS states what ZiLOG knows about this product at this time, but additional features or non-conformance with (c) 1998 by ZiLOG, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of ZiLOG, Inc. The information in this document is subject to change without notice. Devices sold by ZiLOG, Inc. are covered by warranty and patent indemnification provisions appearing in ZiLOG, Inc. Terms and Conditions of Sale only. ZILOG, INC. MAKES NO WARRANTY, EXPRESS, STATUTORY, IMPLIED OR BY DESCRIPTION, REGARDING THE INFORMATION SET FORTH HEREIN OR REGARDING THE FREEDOM OF THE DESCRIBED DEVICES FROM INTELLECTUAL PROPERTY INFRINGEMENT. ZILOG, INC. MAKES NO WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. ZiLOG, Inc. shall not be responsible for any errors that may appear in this document. ZiLOG, Inc. makes no commitment to CP00300-TVX0698 some aspects of the CPS may be found, either by ZiLOG or its customers in the course of further application and characterization work. In addition, ZiLOG cautions that delivery may be uncertain at times, due to start-up yield issues. update or keep current the information contained in this document. ZiLOG's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and ZiLOG prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. ZiLOG, Inc. 910 East Hamilton Avenue, Suite 110 Campbell, CA 95008 Telephone (408) 558-8500 FAX 408 558-8300 Internet: http://www.zilog.com PRELIMINARY 9